By Werner Geurts, Francky Catthoor, Serge Vernalde, Hugo De Man
Accelerator Data-Path Synthesis for High-Throughput sign ProcessingApplications is the 1st publication to teach easy methods to use high-level synthesis thoughts to deal with the stringent timing standards of complicated high-throughput real-time sign and information processing. The publication describes the cutting-edge in architectural synthesis for complicated high-throughput real-time processing. in contrast to many different, the Synthesis strategy utilized in this e-book pursuits an structure kind or an software area. This technique is therefore seriously application-driven and this is often illustrated within the ebook via numerous reasonable demonstration examples used all through.
Accelerator Data-Path Synthesis for High-Throughput sign ProcessingApplications specializes in domain names the place application-specific high-speed suggestions are appealing resembling major components of audio, telecom, instrumentation, speech, robotics, scientific and automobile processing, photo and video processing, television, multi-media, radar, sonar, and so on. additionally, it addresses usually the stairs above the normal scheduling and allocation projects which specialize in scalar operations and information.
Accelerator Data-Path Synthesis for High-Throughput sign ProcessingApplications is of curiosity to researchers, senior layout engineers and CAD managers either in academia and undefined. It offers an outstanding review of what functions to count on from destiny functional layout instruments and contains an in depth bibliography.
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Additional resources for Accelerator Data-Path Synthesis for High-Throughput Signal Processing Applications
In more recent work, approaches in which an additional level of functional hierarchy is created, either in the flow graph, in the data path (the so called accelerator units) or in both have emerged. C. Irvine [Rao 92, Rundensteiner 93]. 2. Also the early approach in FACE to share mutually exclusive graphs in conditions [Hwang 88] has introduced already some form of operator merging but this is only done in a very limited scope. g. [Potkonjak 89]) but that is only part of the story. 45 W. 1 Most early approaches perform architecture synthesis by mapping the primitive operations of the flow graph on primitive building blocks [McFarland 90b].
In a DSP context, the scheduling problem is a time constrained one: all nodes must be scheduled in the time interval [0 ... N cy c - 1]. A second type of constraint are the precedence constraints. Let t( 0) E [0 . Ncyc - 1] denote the control step at which operation 0 is scheduled. For every data precedence in the flow graph , the following relation must hold. d( 0) 0--+ p : t(p) 2: t(o) + d(o) The goal is to find the schedule that requires the set of building blocks with the smallest total area.
X x x ¥. 2 Refinement versus expansion: an abstract multiplication (a) can be expanded into an add/shift subgraph (b) or can be replaced by a mapped mulLMPY operation type (c). The process of choosing an appropriate implementation for an abstract operation type is called refinement. When the target operation type is an expandable operation, one also speaks of expansion. When the target operation is a mapped type, the process is also called ABB type selection. 2. 26 CHAPTER 3 Mapping functions A number of mapping functions, related to the mapping of operation types onto building block types, will now be defined.